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Designing System on a Chip Products using Systems Engineering Tools
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02-08-2010, 04:49 PM
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Designing System on a Chip Products using Systems Engineering Tools
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 Designing System on a Chip Products using Systems Engineering Tools.pdf (Size: 52.68 KB / Downloads: 22)
Designing System on a Chip Products using Systems Engineering Tools
Abstract
Systems engineering is the process which takes requirements specifications and engineers products and product families which involve hardware, software and possibly mechanical subsystems. At the front-end of this process architectural assessment and early quantification is a requirement – answering the what-if questions about the candidate architectures of a product. At the back-end, verification and realization of the selected architecture occurs. Tools to support systems engineering encompass architectural assessment, co-design and coverification and feed into the synthesis and realization tools flow. Systems on silicon products are reliant on systems engineering tools to enable the concurrent design of hardware and software and their modeling and verification prior to realization. This paper describes the systems engineering process and the requirements for tools suppor
Presented By:
Graham R. Hellestrand
CEO and President, VaST Systems Technology Corporation
2700 Augustine Drive, Santa Clara, CA 95054 USA
OVERVIEW
Systems on a chip are no longer hardware devices. The incorporation of wrong software in a ROM just as surely requires respining the silicon as a floating carry chain in an adder. The complexity of modern systems on silicon is dominated by the software complexity – device drivers, real-time operating systems, application programming interfaces (API), middle-ware, applications tasks all executing and intercommunicating. The hardware complexity is increasingly dominated by multiple processor architectures which may incorporate two or more general purpose processors and (usually programmable) signal processing devices. Such formidable complexity is typically beyond the comprehension of single engineers and the division of design groups, usually into hardware and software teams, leaves a yawning chasm with which to address system verification and integration. The 3 to 5 silicon spins, typically scheduled into project plans, attest to the methodological and technical difficulties of systems integration and verification. The advent of systems engineering tools, which grew from the base of the predecessor co-verification and co-design tool sets, is a response to the needs of building systems on a chip efficaciously. This paper examines the hardwaresoftware engineering process and discusses requirements for tools to support the engineering of systems on silicon. The paper ends with a brief summary. |
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